1. Field
This disclosure relates generally to semiconductor processing, and more specifically, to a method for forming a packaged semiconductor device.
2. Related Art
Packaged semiconductor devices contain a number of pins in order to for the semiconductor device to communicate with a printed circuit board. These packages may include “test only” pins which are intended for debug and other internal-use monitoring only. These test only pins may include, for example, Process Optimization Structure (POSt) pins, Dual Data Rate (DDR) test point pins, and analog test point pins. Typically, upon connecting these packaged semiconductor devices to printed circuit boards, these test only pins are grounded. However, even though they may be grounded, in order to ensure proper operation of the semiconductor device, these test only pins must still achieve the same qualification standards as other pins on the device, such as electro-static discharge robustness. Furthermore, these test only pins add to the pin count and require additional die area, which is undesirable, especially as semiconductor devices continue to decrease in size.